![]() ![]() The proposed low-power design of LFSR and DSSS transmitter with implementation results is illustrated in this paper. In this article, binary pseudo-noise (PN) sequences are generated using a low-power linear feedback shift register (LFSR) in order to spread transmit signals extensively. With a low-power very large-scale integration (VLSI) architecture, sophisticated processing of wide-bandwidth DSSS systems can be exploited in FPGAs/ASICs. As the digital and the analogue system components are required on the same substrate in today’s mixed-signal chips, the DSSS transmitter system is proposed to be implemented in field-programmable gate array (FPGA)–based platforms and application-specific integrated circuits (ASICs). These are based on a concept that narrowband signal is scrambled before transmission in such a way that the signals occupy a much larger part of the radio frequency spectrum. ![]() Spread spectrum communication techniques make the signals more robust against interference and jamming. An interesting area of application in wireless data communication is direct-sequence spread spectrum (DSSS). ![]()
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